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15 - EEE - Electrical & Electronics Engineering


EEE 185B - Advanced VHDL (2 Days)

Code Start Date Duration Venue
EEE 185B 25 August 2022 2 Days Ankara Registration Form Link
EEE 185B 20 October 2022 2 Days Ankara Registration Form Link
EEE 185B 28 December 2022 2 Days Ankara Registration Form Link
Please contact us for fees

 

Course Description

Advanced VHDL builds on the foundation of the previous module to prepare the engineer for complex FPGA or ASIC design. It focuses on the use of VHDL for large hierarchical designs, design re-use, and the creation of more powerful test benches.
 

The minumum number of participants for this course is 5.

Course Objectives

  • Understanding the VHDL language concepts constructs essential for complex FPGA and ASIC design
  • Understanding the VHDL language constructs and coding styles that enable sophisticated test benches
  • Learning how to code hierarchical designs using multiple VHDL design libraries
  • Learning how to write re-usable, parameterisable VHDL code by exploiting generics and data types
  • Learning how to run gate-level simulations

Who Should Attend?

  • Engineers who wish to become skilled in the practical use of VHDL for FPGA or ASIC design
  • Engineers who are about to embark on the first VHDL design project
  • Engineers who have already acquired some practical experience in the use of VHDL, but wish to consolidate and extend their knowledge within a training environment

Course Details/Schedule

Day 1

  • Managing Hierarchical Designs
  • Parameterised Design Entities
  • More About Types

 

Day 2

  • Procedural Testbenches
  • Text-File-Based Testbenches
  • Gate Level Simulation